Altera Optimizes Leading-Edge IP Cores for Stratix FPGAs

58 IP Cores Are Now Available from Altera and Its Partners

SAN JOSE, Calif., Aug. 12 /PRNewswire-FirstCall/ -- Altera Corporation (Nasdaq: ALTR - News) today announced the availability of 58 intellectual property (IP) cores optimized for Altera's new Stratix(TM) FPGA family. With the IP megafunctions available from Altera and its Altera Megafunction Partners Program (AMPP(TM)) partners, designers can accelerate their designs by integrating proven IP solutions with the world's fastest programmable logic device (PLD) family.

IP cores that have been ported to the Stratix device architecture include the leading-edge 10 Gbps POS-PHY Level 4 and RapidIO(TM) interface MegaCore® products from Altera. In addition, the 10 Gigabit Ethernet MAC core and the SPI-4 Phase 1 core from AMPP partners MorethanIP and Modelware, respectively, are available now for Stratix implementation. A complete list of all 58 IP cores available for Stratix devices can be found on Altera's IP MegaStore(TM) web site ( http://www.altera.com/IPmegastore ) by entering keyword "Stratix."

"Most of our IP portfolio has now been fully ported to Altera's Stratix device family," said Anthony Dalleggio, executive vice president of Modelware, an AMPP partner since 1996. "Stratix tool support in the Quartus® II software is very robust, and has made the porting of our IP and meeting the performance targets straightforward."

All of the IP cores are optimized or redesigned to take advantage of the Stratix architecture's advanced features such as embedded digital signal processing (DSP) blocks, TriMatrix(TM) memory, enhanced I/O features, and advanced clock management circuitry. In addition to saving hundreds of logic elements (LEs), push-button performance increases significantly. For example, Altera's NCO Compiler MegaCore function benefits from a size reduction of 41 percent and an fMAX improvement of 57 percent by taking advantage of the Stratix device family's high-performance DSP architecture and Tri-Matrix(TM) memory structure.

"The Stratix device family provides significant cost and performance benefits for Altera's customers, and the availability of a large number of IP functions makes it easier for customers to finish high-performance designs in less time," said Justin Cowling, Altera's director of IP marketing. "More than 80 percent of the IP functions sold last year have now been ported to Stratix devices."

Availability

The newly optimized IP cores for Stratix devices are available today for download from the Altera web site. Altera customers with a current MegaCore subscription for an IP core can integrate the new version supporting Stratix immediately for production designs. Altera's unique OpenCore® and OpenCore Plus programs allow new users to evaluate, simulate, and verify MegaCore functions prior to licensing.

About Stratix Devices

Stratix devices are based on a 1.5-V, 0.13-micron, all-layer copper SRAM process, with densities ranging from 10,570 to 114,140 logic elements and up to 10 Mbits of RAM. Stratix devices support various differential I/O electrical standards such as the LVDS, LVPECL, PCML and HyperTransport(TM) standards, as well as high-speed interfaces, including the UTOPIA IV, SPI-4 Phase 2, SFI-4, 10G Ethernet XSBI, RapidIO, HyperTransport and other interfaces. More technical information about the Stratix device family is available at http://www.altera.com/stratix .

About the Altera Megafunction Partners Program (AMPP)

The Altera Megafunction Partners Program, established in August 1995, was created to bring the advantages of design reuse to users of Altera programmable logic devices. AMPP is an alliance between Altera and developers of IP cores that encourages megafunction development. Altera provides technical information and training to the AMPP partners, who create and support IP cores targeted for Altera PLDs. Currently, there are over 30 AMPP partners offering more than 150 megafunctions. Customers may request a free evaluation of any of these cores through Altera's megafunction listings at http://www.altera.com/IPmegastore .

About Altera

Altera Corporation is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high- value programmable solutions to approximately 14,000 customers worldwide. More information is available at http://www.altera.com .

NOTE: Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. RapidIO is a trademark of the RapidIO Trade Association. HyperTransport is a trademark of the HyperTransport Technology Consortium. All other product or service names are the property of their respective holders.

     Editor Contact:
     Bruce Fienberg
     Altera Corporation
     408-544-6397
     newsroom@altera.com